HLS In-System Debugging


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This page hosts our HLS In-System Debugging framework.  This work has been described in several publications:

  • Effective FPGA debug for high-level synthesis generated circuits (FPL 2014)
  • Using Dynamic Signal-Tracing to Debug Compiler-Optimized HLS Circuits on FPGAs (FCCM 2015)
  • Allowing Software Developers to Debug HLS Hardware (FSP 2015)
  • Using Round-Robin Tracepoints to Debug Multithreaded HLS circuits on FPGAs (FPT 2015)
  • Quantifying observability for in-system debug of high-level synthesis circuits (FPL 2016)
  • Signal-Tracing Techniques for In-System FPGA Debugging of High-Level Synthesis Circuits (TCAD 2017)
  • Enabling Long Debug Traces of HLS Circuits Using Bandwidth-Limited Off-Chip Storage Devices (FCCM 2017)

Installing

The source code is available by filling out the form at the bottom of the page.  This will provide you with a link to download a patch file, which can applied to the LegUp 4.0 source code, using the following command (run from the top-level LegUp 4.0 directory)

patch -p1 < patchfile.patch

License

The source code provided in the patch file is governed by the following MIT license.  (NOTE: LegUp 4.0, which can be downloaded at http://legup.eecg.utoronto.ca/, is govered by a separate license, available at http://legup.eecg.toronto.edu/license.php)

Copyright (c) 2017 Jeffrey Goeders, Steve Wilton

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